1 12/13/01 supertex inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. no responsibility is assumed for possible omissions or inaccuracies. circuitry and specifications are subject to c hange without notice. for the latest product specifications, refer to the supertex website: http://www.supertex.com. for complete liability information on all supertex products, refer to the most curre nt databook or to the legal/disclaimer page on the supertex website. dn2535 dn2540 advanced dmos technology not recommended for new designs. for products in to-92 (n3) package and to-243aa (n8) package, please use dn3535 or dn3545 instead. these low threshold depletion-mode (normally-on) transistors utilize an advanced vertical dmos structure and supertex?s well-proven silicon-gate manufacturing process. this combina- tion produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and posi- tive temperature coefficient inherent in mos devices. character- istic of all mos structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. supertex?s vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. features ? high input impedance ? low input capacitance ? fast switching speeds ? low on resistance ? free from secondary breakdown ? low input and output leakage applications ? normally-on switches ? solid state relays ? converters ? linear amplifiers ? constant current sources ? power supply circuits ? telecom absolute maximum ratings drain-to-source voltage bv dsx drain-to-gate voltage bv dgx gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds. note : see package outline section for dimensions. package options n-channel depletion-mode v ertical dmos fets t o-92 s g d t o-243aa (sot-89) g d s d t o-220 t ab: drain g d s product marking for to-243aa: dn5d ? where ? = 2-week alpha date code * same as sot-89. product shipped on 2000 piece carrier tape reels. bv dsx /r ds(on) i dss bv dgx (max) (min) to-92 to-220 to-243aa* 350v 25 ? 150ma dn2535n3 dn2535n5 ? 400v 25 ? 150ma dn2540n3 dn2540n5 dn2540n8 ordering information order number / package
2 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 0v v dd r gen 0v -10v symbol parameter min typ max unit conditions bv dsx dn2540 400 v v gs = -5v, i d = 100 a dn2535 350 v gs(off) gate-to-source off voltage ?1.5 ?3.5 v v ds = 25v, i d = 10 a ? v gs(off) change in v gs(off) with temperature 4.5 mv/ cv ds = 25v, i d = 10 a i gss gate body leakage current 100 na v gs = 20v, v ds = 0v i d(off) drain-to-source leakage current 10 av gs = -10v, v ds = max rating 1mav gs = -10v, v ds = 0.8 max rating t a = 125 c i dss saturated drain-to-source current 150 ma v gs = 0v, v ds = 25v r ds(on) static drain-to-source 17 25 ? v gs = 0v, i d = 120ma on-state resistance ? r ds(on) change in r ds(on) with temperature 1.1 %/ cv gs = 0v, i d = 120ma g fs forward transconductance 325 m i d = 100ma, v ds = 10v c iss input capacitance 200 300 v gs = -10v, v ds = 25v c oss common source output capacitance 12 30 pf f = 1 mhz c rss reverse transfer capacitance 1 5 t d(on) turn-on delay time 10 v dd = 25v, t r rise time 15 ns i d = 150ma, t d(off) turn-off delay time 15 r gen = 25 ? t f fall time 20 v sd diode forward voltage drop 1.8 v v gs = -10v, i sd = 120ma t rr reverse recovery time 800 ns v gs = -10v, i sd = 1a notes: 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. electrical characteristics (@ 25 c unless otherwise specified) drain-to-source breakdown voltage switching waveforms and test circuit ? dn2535/dn2540 package i d (continuous)* i d (pulsed) power dissipation jc ja i dr *i drm @ t c = 25 c c/w c/w to-92 120ma 500ma 1.0w 125 170 120ma 500ma to-220 500ma 500ma 15.0w 8.3 70 500ma 500ma to-243aa 170ma 500ma 1.6w (t a = 25 ) ? 15 78 ? 170ma 500ma * i d (continuous) is limited by max rated t j . ? mounted on fr5 board, 25mm x 25mm x 1.57mm. significant p d increase possible on ceramic substrate. t a = 25 c thermal characteristics
3 output characteristics 0.5 0.4 0.3 0.2 0.1 0 080 160 240 320 400 v ds (volts) transconductance vs. drain current power dissipation vs. temperature 0 150 100 50 10 20 0 125 75 25 to-220 to-92 to-243aa v gs = 1.0v 0.5v -0.5v -1.0v 0v saturation characteristics 250 200 150 100 50 0 0123 5 4 v gs = 1.0v 0.5v 0v -0.5v -1.0v maximum rated safe operating area 1 1000 100 10 1 0.1 0.01 0.001 to-92/to-220 (pulsed) sot-89 (dc) t c = 25 c (t a = 25 c) to-220 (dc) to-92 (dc) thermal response characteristics thermal resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0.001 10 0.01 0.1 1 0 to-243aa t a = 25 c p d = 1.6w 0.5 0.4 0.3 0.2 0.1 0 0 250 50 100 150 200 v ds = 10v t a = -55 c t a = 25 c t a = 125 c to-220 t c = 25 c p d = 15w to-92 t c = 25 c p d = 1.0w (t a = 25 c) i d (amperes) i d (milliamps) v ds (volts) g fs (siemens) i d (milliamps) t c ( c) p d (watts) v ds (volts) i d (amperes) t p (seconds) dn2535/dn2540 t ypical performance curves
4 1235 bordeaux drive, sunnyvale, ca 94089 tel: (408) 744-0100 ? fax: (408) 222-4895 www.supertex.com 12/13/010 ?2001 supertex inc. all rights reserved. unauthorized use or reproduction prohibited. bv dss variation with temperature bv dss normalized 1.1 1.05 1.0 0.95 0.9 -50 080 160 240 320 400 0 50 100 150 transfer characteristics v gs (volts) v ds (volts) i d (amperes) 0.40 0.32 0.24 0.16 0.08 0 -3 2 -1 0 12 capacitance vs. drain-to-source voltage c (picofarads) 200 150 100 50 0 010 20 30 40 v gs = -5v v gs = 0v v ds = 10v v gs = -10v c oss c rss c iss t a = -55 c t a = 25 c r ds (on) @ i d = 120ma v gs(off) @ 10 a v ds = 20v v ds = 40v 200pf 170pf t a = 125 c on-resistance vs. drain current 100 80 60 40 20 0 q c (nanocoulombs) r ds(on) (ohms) -50 0 50 100 150 0 0.4 0.8 1.2 1.6 2.0 v gs(off) and r ds variation with temperature 2.5 2 1.5 1 0.5 0 15 10 5 0 -5 t j ( c) normalized gate drive dynamic characteristics v gs (volts) t j ( c) i d (milliamps) dn2535/dn2540 t ypical performance curves
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